High performance CMOS devices should have, among other characteristics, good short channel behavior, low parasitic junction capacitances and low junction leakage currents. However, as the size of integrated circuits (ICs) continues to shrink and the number of high performance CMOS devices on IC chips continue to increase, the dimensions of the CMOS devices must be scaled down. The scaling down of CMOS devices makes it difficult to achieve good short channel effects, low parasitic junction capacitances and low junction leakage currents.
Accordingly, methods are needed for manufacturing smaller ICs with scaled down high performance CMOS devices.